Writing Hardware Simulators?

[Miki Tebeka]

Hello All,

I'll be writing a hardware simulator for one of our CPU's shortly.
Any advices/links/... on the subject?

Thanks.
Miki

[Peter Hansen]

Re: Writing Hardware Simulators?

Miki Tebeka wrote:[color=blue]
>
> I'll be writing a hardware simulator for one of our CPU's shortly.
> Any advices/links/... on the subject?[/color]

No links I'm aware of, although you can easily find an HC11 simulator
out there somewhere.

Kaval has written but not yet released (okay, not even completed) an
HC12 simulator (independent of the above effort).

Performance is roughly 1/60 of the actual CPU speed running at the
nominal clock speed (16MHz), when the code is run on the simulator
on a PC of about 600MHz.

If performance is not your greatest concern (which presumably it isn't
or you wouldn't consider Python in the first place :-), you shouldn't
have much difficulty...

Advice? Write *lots* of tests. In fact, write dozens (literally!)
of test cases for each opcode.

Make sure you have a clear idea of your priorities and don't try to
implement more than you really need, to begin with. I didn't need
anything involving simulating the actual instruction cycle times
(i.e. simulating time was not important yet), and I haven't gotten
to the point where I care much about simulating hardware peripherals
such as the serial port. I'm just doing the basic CPU and opcodes,
and obviously memory. As a result of this narrow focus, it took
only a few weeks to produce an effective, usable simulator, although
I still have a few opcodes to complete. (Even the opcodes I'm
implementing only as I have code that requires them. I suggest
implementing an UnimplementedOp code exception for *all* opcodes,
then running your code. Only implement the actual opcodes as you
need them...)

-Peter

[Terry Reedy]

Re: Writing Hardware Simulators?

[color=blue]
> I'll be writing a hardware simulator for one of our CPU's shortly.
> Any advices/links/... on the subject?[/color]

Have you googled the newsgroup?

http://groups.google.com/groups?hl=en&lr=&ie=UTF-8&group=comp.lang.python

'hardware simulator' returns 22 hits, including your post

For the web in general, 'Python hardware simulator' gets 17000 hits so
you might want to narrow the search.

TJR

[Donald 'Paddy' McCarthy]

Re: Writing Hardware Simulators?

I take it that this is an instruction set simulator (ISS) rather than an
RTL level simulator?

Miki Tebeka wrote:[color=blue]
> Hello All,
>
> I'll be writing a hardware simulator for one of our CPU's shortly.
> Any advices/links/... on the subject?
>
> Thanks.
> Miki[/color]

[Miki Tebeka]

Re: Writing Hardware Simulators?

Hello Donald,
[color=blue]
> I take it that this is an instruction set simulator (ISS) rather than an
> RTL level simulator?[/color]
Not so sure about the difference (RTL = Real Time Logic?).
It should simulate the CPU and some peripherials as well.
Currently I can ignore the pipline and some other stuff.

Thanks.
Miki

[Miki Tebeka]

Re: Writing Hardware Simulators?

Hello Terry,
[color=blue]
> http://groups.google.com/groups?hl=e...mp.lang.python
>
> 'hardware simulator' returns 22 hits, including your post[/color]
I know. None of them is much use (including mine :-)
[color=blue]
> For the web in general, 'Python hardware simulator' gets 17000 hits so
> you might want to narrow the search.[/color]
Thats what I'm working on now.

Thanks
Miki

[Thomas Heller]

Re: Writing Hardware Simulators?

tebeka@cs.bgu.a c.il (Miki Tebeka) writes:
[color=blue]
> Hello All,
>
> I'll be writing a hardware simulator for one of our CPU's shortly.
> Any advices/links/... on the subject?
>
> Thanks.
> Miki[/color]

Miki, I do not know if this is what you are looking for?

"""
MyHDL is a Python package for using Python as a hardware description
and verification language.
"""

<http://jandecaluwe.com/Tools/MyHDL/Overview.html>

Thomas

[Jan Decaluwe]

Re: Writing Hardware Simulators?

Miki Tebeka wrote:[color=blue]
> Hello Donald,
>
>[color=green]
>>I take it that this is an instruction set simulator (ISS) rather than an
>>RTL level simulator?[/color]
>
> Not so sure about the difference (RTL = Real Time Logic?).
> It should simulate the CPU and some peripherials as well.
> Currently I can ignore the pipline and some other stuff.[/color]

RTL = Register Transfer Level. This is a hardware description style
that models transfers between registers. In practice, it is often
used to refer to "synthesiza ble" hardware models, that is, models
that can be converted to a gate implementation automatically.

If you need to model hardware, it may be easier when you have a
light-weight model for deterministic concurrency. This is what
so-called "hardware description languages" (HDLs) provide. I wrote
a package that turns Python into an HDL, using generators:

http://jandecaluwe.com/Tools/MyHDL/Overview.html

There is a one-week old mailing list:

http://sourceforge.net/mail/?group_id=91207

with a nntp gateway though gmane:

nntp://news.gmane.org/gmane.comp.pyth on.myhdl

Nick Patavalis has just posted an example CPU simulator
to this mailing list, so you may want to check it out.

Regards, Jan

--
Jan Decaluwe - Resources bvba - http://jandecaluwe.com
Losbergenlaan 16, B-3010 Leuven, Belgium
Bored with EDA the way it is? Check this:

http://jandecaluwe.com/Tools/MyHDL/Overview.html