Hello Folks,
I am trying to hook up a CPU which I designed using SystemC to I/O pins on an FPGA.
My problem (spelled failure) is with the synthesis of my design into a bitstream, not the C++ language.
Are any of you able to point me at a working example for the OrangeCrab boards? I have one available, so a working example is something I can insert my work into.
Searching the 'net gives an outlandish number of results, which is to say that I'm lost in the results.
FYI - SystemC is a C++ library which provides for event simulation and hardware synthesis when using a restricted subset.
Thank You,
Oralloy
I am trying to hook up a CPU which I designed using SystemC to I/O pins on an FPGA.
My problem (spelled failure) is with the synthesis of my design into a bitstream, not the C++ language.
Are any of you able to point me at a working example for the OrangeCrab boards? I have one available, so a working example is something I can insert my work into.
Searching the 'net gives an outlandish number of results, which is to say that I'm lost in the results.
FYI - SystemC is a C++ library which provides for event simulation and hardware synthesis when using a restricted subset.
Thank You,
Oralloy