jacob navia wrote:
.... snip ...
And the "AMD x64 architecture" is not what Knuth is talking about,
I believe. That architecture may have a 64 bit memory interface,
but is perfectly capable of addressing and accessing single 8 bit
bytes. He is worrying about systems where any memory access must
transfer a full 64 bits, and the next address (i.e. 1 greater) will
access the next 64 bits.
There are many machines that do not work like the x86.
--
[mail]: Chuck F (cbfalconer at maineline dot net)
[page]: <http://cbfalconer.home .att.net>
Try the download section.
Lew Pitcher wrote:
>
>
>
>
As you (may) know, the 64 bit AMD x64 architecture is now several
years old... It seems you are not up to date what those processors
are concerned.
>FWIW, translated into C, you get a 1:1 ratio of characters to
>"words". Translated into 80x86 assembly, you probably would coax
>that ratio up to 4:1, and thus would code the assembly language
>to grab 32 bits (4 bytes) at a time.
>"words". Translated into 80x86 assembly, you probably would coax
>that ratio up to 4:1, and thus would code the assembly language
>to grab 32 bits (4 bytes) at a time.
As you (may) know, the 64 bit AMD x64 architecture is now several
years old... It seems you are not up to date what those processors
are concerned.
I believe. That architecture may have a 64 bit memory interface,
but is perfectly capable of addressing and accessing single 8 bit
bytes. He is worrying about systems where any memory access must
transfer a full 64 bits, and the next address (i.e. 1 greater) will
access the next 64 bits.
There are many machines that do not work like the x86.
--
[mail]: Chuck F (cbfalconer at maineline dot net)
[page]: <http://cbfalconer.home .att.net>
Try the download section.